First Intel Wildcat Lake Laptops Near Launch; Reportedly Built on 18A, Taking Aim at Apple’s MacBook Neo
  The first laptops powered by Intel’s “Wildcat Lake” Core Series 300 processors for the entry-level PC segment are reportedly nearing launch. According to Wccftech, Intel Core Series 3 laptops could hit retail shelves as early as next week, with initial models including 14-inch and 16-inch designs from Honor and ASUS, while more OEMs are expected to follow.  Chinese media outlet Mydrivers notes that the Honor Notebook X14 2026 Combat Edition will be the first commercially available laptop based on Intel’s Wildcat Lake platform, featuring an Intel Core 5 320 processor. Another Wccftech report notes that the device comes with 16GB of LPDDR5X 7467 MT/s memory, double the capacity of Apple’s MacBook Neo, along with a 512GB SSD. By comparison, the Neo starts at 256GB of storage and tops out at 512GB.  Intel’s Wildcat Lake Targets AI PCs With Better Battery Life  The SoC package integrates two dies, with the primary die built on Intel’s 18A node, according to TechPowerUp. This die features a 6-core CPU configuration, NPU 5 delivering 40 TOPS of INT8 performance, and a GPU with up to two Xe3 cores. It also integrates the memory controller and cache pool. Meanwhile, Intel dedicates the second die to I/O functions, the report adds.  Wccftech notes that Intel’s Core Series 3 emphasizes AI capability and battery efficiency, marking the company’s first hybrid AI-ready Core Series processor. The report adds that the chips are designed for all-day battery life and everyday productivity, offering up to 2.1 times faster creation and productivity performance, up to 64% lower processor power consumption, and up to 2.7 times higher AI GPU performance compared with previous-generation Intel Core 7 150U processors.  Looking ahead, Wildcat Lake could see broader adoption across future devices. TechPowerUp reports that Google is likely to pair its rumored “Googlebook” laptops with Intel’s latest Core Series 300 “Wildcat Lake” processors. However, Intel is not expected to be the exclusive platform provider, with Qualcomm and MediaTek also said to be among Google’s partners.
Release time:2026-05-19 10:42 reading:397 Continue reading>>
Samsung Reportedly Develops Mobile HBM Packaging With Copper Pillars, Bandwidth Up 15%–30%
  Samsung Electronics is reportedly developing a next-generation HBM packaging technology aimed at bringing high-performance on-device AI to mobile devices. According to ETNews, sources say the company is working on a “Multi Stacked FOWLP” technology that combines ultra-high-aspect-ratio copper pillars with FOWLP (Fan-Out Wafer Level Packaging) by advancing its existing VCS (Vertical Cu-post Stack) technology.  The report notes that traditional mobile memory (LPDDR) packaging still relies on copper wire bonding. However, the technology is limited to roughly 128 to 256 I/O terminals, while also suffering from higher signal loss and lower thermal and power efficiency. To address these constraints, Samsung previously introduced its VCS (Vertical Cu-post Stack) technology, which arranges DRAM dies in a staircase-style stacked structure connected by copper pillars. The newly reported technology is viewed as a further evolution of this approach through the adoption of ultra-high-aspect-ratio copper pillars.  More specifically, Samsung has increased the aspect ratio of copper pillars used in VCS packaging from 3–5:1 to 15–20:1, significantly boosting bandwidth, the report notes. However, copper pillars thinner than 10 micrometers become more vulnerable to bending and breakage. To address this issue, Samsung reportedly combined the design with an FOWLP process, which molds the chip and extends wiring outward to help support the copper pillars.  The approach could enable more I/O terminals within the same area, potentially boosting bandwidth by 15% to 30% while increasing memory stack capacity by more than 1.5 times, the report adds.  Commercialization Timeline Remains Unclear  Meanwhile, the technology is still under development, making the timeline for mass production and commercialization unclear. However, the report says industry observers believe it could be adopted as early as a later version of the Exynos 2800 or the Exynos 2900.  Notably, some industry observers said mobile HBM development and commercialization could progress more slowly than initially expected, as demand for HBM in servers, data centers, and AI accelerators is expected to remain strong for the foreseeable future. The report adds that booming demand for server and data center HBM may make it difficult for Samsung to fully concentrate its resources on mobile HBM development.  SK hynix Advances Mobile AI Packaging  SK hynix is also accelerating development of semiconductor packaging technologies for smartphones and Extended Reality (XR) devices. According to a Hankyung report published earlier this year, sources say the company is developing “High Bandwidth Storage (HBS),” a packaging solution that vertically stacks low-power (LPDDR) DRAM and NAND flash memory beside the Application Processor (AP), which handles core computing tasks in IT devices.  Hankyung notes that HBS adopts a packaging technology called “Vertical Fan-Out” (VFO). Unlike conventional wire bonding, which connects stacked memory and substrates with thin copper wires, VFO uses pillar-shaped interconnects to enable denser wiring and faster data transfer speeds, helping APs process rapidly growing AI-driven workloads.
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Release time:2026-05-15 10:49 reading:502 Continue reading>>
SMIC Founder Says China May Gain Edge in Niche Chips as 80% of Demand Lies Outside Advanced Nodes
  As China pushes to strengthen its chip industry, Richard Chang, founder of SMIC, China’s largest foundry, suggests that success in semiconductors is not solely about winning the 2nm or 3nm race, with niche markets potentially emerging as a key competitive advantage for China. According to STAR Market Daily, Chang said that niche markets have become a key breakthrough point for China’s semiconductor industry, adding that advancing in specialized market segments could help strengthen the country’s overall chip capabilities.  SMIC remains limited to the 7nm node due to its reliance on older DUV lithography equipment. However, Richard Chang’s emphasis on niche markets suggests that the company’s mature-node technologies could still find meaningful opportunities across a range of applications, as noted by Wccftech.  SMIC Founder Highlights Opportunity Beyond Advanced Nodes  As noted by STAR Market Daily, Richard Chang argued that semiconductor success should not be defined solely by achieving 3nm or 2nm nodes, describing such thinking as a misconception and highlighting niche markets as a key opportunity for China’s chip industry.  Chang further noted that advanced nodes account for less than 20% of the global semiconductor market by product volume, while more than 80% of demand comes from mature-node and specialty-process segments. According to Chang, many niche markets still dominated by overseas players could represent key breakthrough opportunities for Chinese semiconductor companies.  The trend may already be emerging across parts of the supply chain. According to TrendForce, with Taiwanese foundries shifting capacity and raising prices, customers in HV processes and CIS applications are increasingly turning to Chinese foundries for more stable pricing and capacity availability. This order migration has been evident since the second half of 2025, driving strong demand for 90 nm-and-above 12-inch wafers among Chinese players.  Beyond Large Models: Richard Chang Highlights Edge AI Potential  In addition, Richard Chang argued that edge AI and scenario-driven applications remain underappreciated opportunities within the broader AI landscape. As STAR Market Daily notes, Chang said sectors such as industrial control, automotive electronics, and wearable devices could create strong demand for application-specific semiconductor solutions, offering startups room to pursue differentiated strategies outside direct competition with global AI giants.
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Release time:2026-05-12 10:24 reading:422 Continue reading>>
Apple Reportedly Keeps 2nm 5G Modem Orders with TSMC Amid Intel Cooperation Signals
  While recent market chatter has focused on a potential shift by Apple between longtime foundry partner TSMC and Intel, the Economic Daily News, citing industry sources, reports that the Cupertino-based company remains heavily dependent on the Taiwanese foundry giant, as it plans to place its entire in-house 5G modem orders with TSMC, leveraging its 2nm process technology.  The report suggests that Apple’s self-developed 5G modem chips are expected to power future iPhone, iPad, and Apple Watch devices, replacing modems from Qualcomm. The volume used across its product lineup is projected to reach hundreds of millions of units, the report adds.  Notably, Apple’s iPhone 17 lineup is expected to be the last to ship with Qualcomm Incorporated’s 5G modems, as the company moves toward a full transition to its in-house C2 baseband chip across all iPhone 18 models, according to Wccftech.  The C2 development builds on Apple’s earlier in-house modem effort. Apple’s C1, first introduced in early 2025 with the iPhone 16e, marked its most complex chip system to date, integrating a 4nm baseband modem and a 7nm transceiver, according to earlier reporting from Reuters. The Economic Daily News further reports that Apple Inc.’s in-house C2 5G modem is expected to add full mmWave support—addressing the Sub-6 GHz limitation of its predecessor—while also incorporating satellite connectivity.  Supply chain sources cited in the Economic Daily News report say TSMC has already secured foundry orders for Apple’s modem chips. Its back-end testing partner is also reportedly preparing for higher demand, with around 600 test systems being procured, as capacity is set to ramp from 2027.  Apple’s Chip Tug-of-War: TSMC vs Intel  Though claims of an Apple order shift to Intel remain unconfirmed, and any such move would not signal a departure from TSMC, cooperation between Apple and Intel appears to be warming. According to The Wall Street Journal, the two companies have reportedly reached a preliminary agreement for Intel to manufacture some of the chips powering Apple devices.  The two sides have been engaged in intensive talks for more than a year, with a formal deal said to have been hammered out in recent months, the report adds.  In parallel, Commercial Times reported earlier that Apple is evaluating Intel’s 18A-P process for its M-series chips. Looking further ahead, The New 7 reports that the first Intel-manufactured low-end M-series chips could emerge as early as mid-2027 under contract production, likely targeting entry-level Macs or iPads.  As highlighted by The Wall Street Journal, Apple’s reported outreach to Intel may reflect growing supply chain pressures, as the Cupertino firm—long TSMC’s top customer—faces tightening access to advanced manufacturing capacity amid surging demand from NVIDIA and other AI chip designers.  Intel previously played a central role in powering Apple’s Mac lineup, before Apple transitioned in 2020 to its own Arm-based custom chips, the report points out.
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Release time:2026-05-11 11:12 reading:450 Continue reading>>
Apple Reportedly Eyes Samsung, Intel U.S. Foundry for Core Chips Amid TSMC Constraints, Supply Diversification
  Apple is reportedly weighing the possibility of having some of its core device chips manufactured by Samsung and Intel. According to Bloomberg, citing sources, the company has held preliminary discussions on using the two as alternative production partners for its main processors—potentially providing a second sourcing option alongside its longstanding supplier, TSMC.  Sources say the company has held early-stage discussions with Intel about leveraging its foundry services, while Apple executives have also visited a Samsung facility under construction in Texas that is expected to produce advanced chips.  That said, the report notes that neither effort has led to any orders so far. Engagements with both suppliers remain at a preliminary stage, as Apple continues to have reservations about adopting non-TSMC manufacturing technologies.  One of the key drivers behind Apple’s potential shift is supply constraints at TSMC, according to Bloomberg. As the report notes, Apple executives addressed the issue during the company’s quarterly earnings call last week, indicating that limited chip availability for iPhone and Mac devices is currently weighing on growth.  In early 2026, Tim Cook identified access to advanced-node manufacturing as the main bottleneck for Apple’s iPhone output, according to CNBC. He noted that production is constrained by limited capacity for the company’s A-series and M-series system-on-chip (SoC) chips, which are fabricated on TSMC’s 3nm process.  In addition, it also aims to maintain at least two suppliers for key components, allowing Apple to strengthen its negotiating leverage on pricing while reducing the risk of supply disruptions, Bloomberg adds.  Apple’s Reported Supplier Talks May Open Door for Intel Comeback, Samsung Gains  Apple’s talks with both companies reportedly began before the most recent supply constraints emerged. As Bloomberg notes, collaborating with Intel could offer an added advantage, potentially strengthening Apple’s ties with the Donald Trump administration. As for Samsung, the report indicates that it has already been working on supplying more peripheral components for Apple’s devices, including power management parts.  In an August 2025 press release, Apple also announced a partnership with Samsung to co-develop a new chip manufacturing technology at Samsung’s Austin fab. Citing industry sources, Business Korea adds that the chip Samsung is expected to produce will likely be used as an image sensor in future iPhones and other Apple products.  Separately, industry momentum appears to be building around Intel’s foundry push. According to Commercial Times, major tech firms including Google and Apple are weighing a shift to Intel’s foundry. The report adds that Apple’s M-series chips are evaluating Intel’s 18A-P node.  Apple’s potential shift could provide a boost to both Samsung and Intel. As the report notes, securing external customers for its foundry business is central to Intel’s turnaround strategy under CEO Lip-Bu Tan. Winning Apple as a client would mark a major milestone for Tan and could help draw in additional business. Samsung, meanwhile, would also stand to gain significantly from an endorsement by Apple.
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Release time:2026-05-06 14:44 reading:394 Continue reading>>
ROHM Launches an Ultra-Compact Wireless Power Chipset for Wearables
  ROHM has developed a wireless power supply IC chipset consisting of the receiver - ML7670 - and transmitter - ML7671 - compatible with Near Field Communication (NFC) technology for compact wearables such as smart rings and smart bands as well as peripheral devices like smart pens.  The smart ring market has seen rapid growth in recent years, primarily in healthcare and fitness applications. However, for extremely small ring-shaped devices worn on the finger, wired charging is impractical, while conventional Qi wireless charging standard is difficult to implement due to constraints such as coil size. This has driven increased demand for a proximity-based power transfer method capable of reliably charging ultra-compact devices.  In response, NFC-based charging, which operates at the high-frequency 13.56MHz band that enables antenna miniaturization, is attracting increased attention, with adoption accelerating in next-generation wearables. Following the successful commercialization of the 1W ML7660/ML7661, ROHM has developed the ML7670/ML7671 chipset optimized for even smaller devices.  This new chipset builds on the proven receiver - ML7660 - and transmitter - ML7661. The maximum power transfer is specified at 250mW, while peripheral components such as the switching MOSFETs required to supply power to the charging IC are built in. The result is a solution optimized for both mounting area and power transfer efficiency in the power class demanded by compact wearable devices, especially smart rings.  The ML7670 power receiver IC achieves a maximum power transfer efficiency of 45% in the 250mW low output range – all in an industry-leading form factor of just 2.28 × 2.56 × 0.48mm. A key feature of the new chipset is superior performance that surpasses the efficiency of comparable products in the same class by optimizing elements such as coil matching, rectifier circuitry, and reduced losses in switching devices.  What's more, all firmware required for wireless power delivery is embedded directly within the IC, eliminating the need for a host MCU. This significantly reduces board space along with development workload in device design.  Compliance with NFC Forum (WLC 2.0) enables power transfer while maintaining compatibility with existing devices, positioning the chipset as a core element in the expanding NFC wireless power ecosystem.  The new chipset is already in mass production. Furthermore, it has been adopted in SOXAI RING 2, the latest model launched on December 10th, 2025, by SOXAI, Inc. (“SOXAI” is pronounced “SOK-sai”.), the Japanese developer and distributor of the original sleep monitoring ring SOXAI RING. Evaluation boards and reference designs are also offered to facilitate integration. For more information, please contact a sales representative or submit an inquiry via the contact page on ROHM’s website.  Going forward, ROHM will continue to promote device development that leverages miniaturization and low-power consumption technologies essential for wearable devices, contributing to improved user convenience and the continued growth of the wearable market.  Specifications  Case Study: SOXAI RING 2 Adoption Example SOXAI RING is the only smart ring for sleep management developed in Japan capable of accurately capturing and analyzing sleep data. It incorporates cutting-edge technologies such as an optical vital sensor, temperature sensor, accelerometer, Bluetooth® Low Energy communication, and NFC wireless charging functionality.  The latest model, SOXAI RING 2, is equipped with Deep Sensing™, a proprietary photoplethysmography (PPG) sensor that significantly improves measurement accuracy, enabling the visualization of physical health changes with far greater depth and precision.  Bluetooth® is a registered trademark of Bluetooth SIG, Inc. in the US.  Deep Sensing™ is a trademark or registered trademark of SOXAI, Inc.
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Release time:2026-04-29 10:03 reading:432 Continue reading>>
ROHM Develops 5th Generation SiC MOSFETs with Approx. 30% Lower On-Resistance at High Temperatures
  ROHM has developed the latest device of its EcoSiC™ series: the 5th Generation SiC MOSFETs optimized for high efficiency power applications. This technology is ideally suitable for automotive electric powertrain systems – such as traction inverters for electric vehicles (xEVs) – as well as power supplies for AI servers and industrial equipment such as data centers.  In recent years, the rapid proliferation of generative AI and big data processing has accelerated the deployment of high-performance servers in the industrial equipment sector. The resulting surge in power density is placing a greater strain on power infrastructure, raising concerns about localized supply shortages. While smart grids that combine renewable energy sources (i.e., solar power) with existing power supply networks are emerging as a possible solution, minimizing losses during energy conversion and storage remains a key challenge.  In the automotive sector, next-generation electric vehicles require extended cruising range and faster charging, creating demand for lower-loss inverters and higher performance onboard chargers (OBCs). Against this backdrop, the adoption of SiC devices capable of both low loss and high efficiency is increasing in high-power applications ranging from a few kilowatts to hundreds of kilowatts.  As the first semiconductor company globally, ROHM was the first in the world to begin mass production of SiC MOSFETs in 2010, contributing to reducing energy losses by implementing SiC devices over a wide range of high-power applications, including offering an early lineup of products compliant with automotive reliability standards such as AEC-Q101. Furthermore, the 4th generation SiC MOSFETs, for which sample provision began in June 2020, have been adopted globally in automotive and industrial applications. They are available across a broad product portfolio, including both discrete devices and modules, supporting the rapid market adoption of SiC technology.  The newly developed 5th Generation SiC MOSFETs achieve industry-leading low loss, driving the broader adoption of SiC technology. Through structural enhancements and manufacturing process optimization, ON resistance is reduced by approximately 30% during high temperature operation (Tj=175°C) compared to conventional 4th Generation products (under the same breakdown voltage and chip size conditions). This improvement contributes to making units smaller while increasing output power in high temperature applications such as traction inverters for xEVs.  ROHM began supporting the bare dies business with 5th Generation SiC MOSFETs in 2025 and completed development in March 2026. Furthermore, starting from July 2026, ROHM will provide samples of discrete devices and modules incorporating 5th Generation SiC MOSFETs.  Going forward, ROHM plans to expand its 5th Generation SiC MOSFET lineup with additional breakdown voltage and package options. ROHM will also continue to enhance its design tools and strengthen application support. By further promoting the implementation of SiC technology – now entering the mainstream phase – ROHM contributes to more efficient power utilization across a wide variety of high-power applications.  Application ExamplesAutomotive Systems: xEV traction inverters, onboard chargers (OBCs), DC-DC converters, electric compressors  Industrial Equipment: Power supplies for AI servers and data centers, PV inverters, ESS (Energy Storage Systems), UPS (Uninterruptible Power Supplies), eVTOL, AC servos  EcoSiC™ BrandEcoSiC™ is a brand of devices that utilize silicon carbide, which is attracting attention in the power device field for performance that surpasses silicon. ROHM independently develops the core technologies needed to advance SiC devices completely in-house, from wafer fabrication and process development to packaging and quality control. At the same time, we have established a fully integrated production system that spans the entire manufacturing flow, solidifying our position as a leading SiC supplier.
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Release time:2026-04-24 10:34 reading:449 Continue reading>>
ROHM has added New Lineup of 17 High-Performance Op Amps Enhancing Design Flexibility
  ROHM has added the new CMOS Operational Amplifier (op amp) series “TLRx728” and “BD728x” to its lineup. These are suitable for a wide range of applications including automotive, industrial, and consumer systems. A broad lineup also makes product selection easier.  In recent years, demand for high-accuracy op amps has been rapidly increasing as automotive and industrial systems become more sophisticated, demanding faster speed, better precision, and higher efficiency. In applications requiring amplification of sensor outputs, minimizing signal error and delay is essential. To meet these requirements, a well-balanced set of key characteristics is needed, including Input Offset Voltage, Noise, and Slew Rate.  These new products are high-performance op amps that offer a low input offset voltage, low noise, and high slew rate. TLRx728 features an input offset voltage of 150 μV (typ.), while the BD728x offers 1.6 mV (typ.). Both series have a noise voltage density of 12 nV/√Hz at 1kHz and a slew rate of 10 V/μs. They are therefore suitable for a wide range of precision applications, including sensor signal processing, current detection circuits, motor driver control, and power supply monitoring systems. Both series are designed to balance versatility and high performance rather than being limited to specific applications.  Rail-to-Rail input/output capability allows maximum utilization of the power supply voltage range, ensuring a wide dynamic range.  Furthermore, in addition to 1 channel, 2 channels, and 4 channels configurations, a diverse range of packages is available, enabling optimal product selection based on application and board size.  The new products are being released simultaneously except for certain part numbers (Sample Price: 1-channel: $2.0, 2-channels: $2.8, 4-channels: $4.0 per unit, excluding tax).  Application Examples  Automotive equipment, industrial equipment, and consumer electronics.  Example use case: Sensor signal processing, current detection circuits, motor driver control, power supply monitoring systems.  Terminology  Input Offset Voltage  The voltage that must be applied between the op amp’s two input terminals to force the output to zero volts.  Slew Rate  A performance metric indicating how rapidly an op amp's output voltage can change while operating in linear region.  Noise Voltage Density  Also called noise spectral density. This is noise power per square root of bandwidth of 1 Hz. The total noise power within a bandwidth of B Hz is Noise Voltage Density x √B.
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Release time:2026-04-03 10:56 reading:591 Continue reading>>
Renesas Develops SoC Technologies for Automotive Multi-Domain ECUs Essential for the SDV Era
  Renesas Electronics Corporation (TSE:6723), a premier supplier of advanced semiconductor solutions, has developed three System-on-Chip (SoC) technologies for automotive multi-domain electronic control units (ECUs). They feature advanced AI processing capabilities and chiplet functions, serving as the core technology platform for next-generation automotive electrical/electronic (E/E) architectures. Renesas presented the results at the International Solid-State Circuits Conference 2026 (ISSCC 2026), held February 15–19 in San Francisco, USA.  In the age of software-defined vehicles (SDVs), automotive SoCs require advanced performance to run multiple applications simultaneously and must offer scalability through chiplets. They must also meet the functional safety requirements of automotive SoCs. As multi-domain SoCs powering central computing are growing larger and more complex, maintaining automotive-grade quality is becoming more difficult. With increased performance in advanced SoCs, power consumption also rises, making improvements in power efficiency and safety vital. To meet these needs, Renesas has developed the following new technologies.  1. Chiplet architecture that supports functional safety  To meet the functional safety requirements of automotive SoCs, Renesas has developed a new, proprietary architecture that supports ASIL D even in a chiplet configuration. By combining the standard die-to-die UCIe interface with a proprietary RegionID mechanism, the architecture prevents interference with hardware resources, even when numerous applications run simultaneously, thereby achieving Freedom from Interference (FFI).  Conventional UCIe interfaces lack functionality to transmit RegionIDs between dies. Renesas developed a method for mapping RegionIDs into physical address space, encoding them into the UCIe region, and transmitting them. This enables safe access control through the memory management unit (MMU) and real-time cores, and meets functional safety requirements across chiplets. Additionally, by maintaining bandwidth from processors to the memory bus, the UCIe interface was confirmed through testing to achieve a high transmission speed of 51.2 GB/s, approaching the upper limit of intra-SoC transfer speeds. This technology provides both scalability and safety for high-performance automotive SoCs.  2. Advanced AI processing capabilities and automotive-grade quality  Automotive-grade quality is vital for SDV systems. Renesas has created a 3 nm SoC design that improves the performance of neural processing units (NPUs) for AI processing, while maintaining automotive-grade quality. In recent years, NPUs have been growing larger, with their area expanding 1.5-fold compared to previous generations. This has led to increased clock latency between shared clock sources and individual circuits. To address this problem, Renesas has redesigned the clock architecture by splitting up clock pulse generators (CPGs), which in past designs were module-level units, and placing mini-CPGs (mCPGs) at the sub-module level. This greatly reduces clock latency and meets timing requirements.  However, multi-layer mCPGs complicate test clock synchronization, which is critical for achieving zero defects in automotive applications. Renesas has integrated test circuits into the hierarchical CPG architecture and unified the signal path for user clocks and test clocks. The new design also synchronizes upper- and lower-level mCPGs under a single clock source in test mode. This makes unified phase adjustment possible. As a result, Renesas has been able to achieve quality aligned with zero-defect expectations, even for large-scale SoCs, providing the high reliability required for next-generation SDV automotive SoCs.  3. Advanced power control and monitoring for improved power efficiency and safety  To achieve the high level of performance required for automotive SoCs with improved power efficiency and safety, Renesas has developed advanced power gating technology that uses over 90 power domains. It enables precise power control, from several milliwatts to several tens of watts, depending on operating conditions. Furthermore, Renesas has split power switches (PSWs) into ring PSWs and row PSWs to reduce IR drops (voltage drops) associated with increasing current density from smaller process geometries. When power is turned on, the ring PSW suppresses rush currents. Then the row PSW equalizes impedance within the domain. Together, these reduce IR drops by roughly 13% compared with conventional designs.  To meet ASIL D functional safety standards, the dual core lock step (DCLS) configuration controls the master and checker cores with independent power switches and controllers. With this design, even if one side fails, the failure can be detected through lockstep operation. Furthermore, loopback monitoring is performed for each PSW's gate signal, so OFF states are detected when a failure occurs. A digital voltage meter (DVMON), which is highly resistant to temperature drift, is used for voltage monitoring. This improves aging tolerance by 1.4 mV. These technologies enable high-performance automotive SoCs that offer both power efficiency and safety.  These new technologies are being used in Renesas' R-Car X5H SoC for automotive multi-domain ECUs. With R-Car X5H, users can accelerate the evolution of SDVs while ensuring safety and enabling autonomous driving, digital cockpit and more.  About Renesas Electronics Corporation  Renesas Electronics Corporation (TSE: 6723) empowers a safer, smarter and more sustainable future where technology helps make our lives easier. A leading global provider of microcontrollers, Renesas combines our expertise in embedded processing, analog, power and connectivity to deliver complete semiconductor solutions. These Winning Combinations accelerate time to market for automotive, industrial, infrastructure and IoT applications, enabling billions of connected, intelligent devices that enhance the way people work and live. Learn more at renesas.com. Follow us on LinkedIn, Facebook, X, YouTube, and Instagram.  (Remarks) All names of products or services mentioned in this press release are trademarks or registered trademarks of their respective owners.
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Release time:2026-02-28 15:45 reading:951 Continue reading>>
Murata develops integrated passive device for Semtech’s SX126X family
  Murata Manufacturing Co., Ltd. has developed a new integrated passive device (IPD) for use with the Semtech LoRa Connect™ SX126x family, which includes the SX1261, SX1262, and LLCC68 products. Using a proprietary low-temperature co-fired ceramic (LTCC) process, Murata has successfully replaced a series of discrete matching components of the SX1261/2 reference design with a single 2.00mm x 1.25mm size LTCC component.  The IPD enables SX1261/2 radio designers to optimize for both size and performance using two dedicated parts. The LFB21892MDZ7F957 is optimized for US and European ISM bands, delivering the full output power for the US FCC bands. The LFB21892MDZ7F821 is optimized for Eurocentric designs that need to maximize the efficiency performance.  “The Murata IPD offers the most efficient development path to realizing the full performance of the SX1261/2, featuring a miniaturized form factor that can significantly reduce board space,” says Arthur Kiang, Product Manager, RF Components, Murata. “The reduction in the number of matching components enables lower material costs and simplifies the design process, leading to shorter lead times. This integration also lowers the probability of soldering and manufacturing issues, as there is only one component to monitor in production.”  “Semtech’s LoRa Connect™ SX126x family has become the trusted choice for LoRaWAN® networks and long-range IoT connectivity in applications from smart metering to industrial sensing,” says Carlo Tinella, product marketing director of wireless and sensing products at Semtech. “Murata’s IPD solution demonstrates the strength of our LoRa® ecosystem, helping radio engineers accelerate development while optimizing for both miniaturization and regulatory compliance. This partnership streamlines the path from design to deployment for millions of IoT devices being deployed globally.”  Product samples are currently available, with mass production of the IPD commencing shortly.
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Release time:2025-11-28 17:33 reading:936 Continue reading>>

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